System test
Figure 019 (SHEET 1)
R 1EFF : 106-149, 303-399, 401-499, 1 31-69-00Page 34 1 1 Aug 01/05 1 1 1CES 1
System test
Figure 019 (SHEET 2)
R 1EFF : 106-149, 303-399, 401-499, 1 31-69-00Page 35 1 1 Aug 01/05 1 1 1CES 1
System test
Figure 020 (SHEET 1)
R 1EFF : 106-149, 303-399, 401-499, 1 31-69-00Page 36 1 1 Aug 01/05 1 1 1CES 1
System test
Figure 020 (SHEET 2)
R 1EFF : 106-149, 303-399, 401-499, 1 31-69-00Page 37 1 1 Aug 01/05 1 1 1CES 1
System test
Figure 021 (SHEET 1)
R 1EFF : 106-149, 303-399, 401-499, 1 31-69-00Page 38 1 1 Aug 01/05 1 1 1CES 1
System test
Figure 021 (SHEET 2)
R 1EFF : 106-149, 303-399, 401-499, 1 31-69-00Page 39 1 1 Aug 01/05 1 1 1CES 1
System test Figure 022
R 1EFF : 1 1 1CES 106-149, 303-399, 401-499, 1 111 31-69-00 Page 40 Aug 01/05
**ON A/C 001-049, 051-099, 101-105, 151-199, 201-299, 301-302,
The general criterion applied for the I/P bus failure detection is the following: for a given bus, if any of the labels constantly monitored by the DMC for checking of the bus validity is seen in the INVALID condition (i.e.: |no refresh| or|SSM in the F/W state| or|SSM in the F.T. state in flight|), the bus is considered faulty for the BITE, provided that the failure is present for 1,5s min.
NOTE : After each DMC reset, the monitoring of external failures is
____ inhibited for 20s. The failure criteria for all the DMC I/P buses are: IRSX: general criterion (X = 1, 2 or 3) ADCX: general criterion (X = 1, 2 or 3) FACX: general criterion or bad FAC healthy discrete signal (X = 1 or 2) FMGCX-EFIS : bad FMGC healthy discrete signal (X = 1 or 2) FCU-X: general criterion (X = A or B) FMGCX-A : general criterion (X = 1 or 2)
VORX, DMEX, ILSX, R/AX, ADFX : general criterion (X = 1 or 2)
R **ON A/C 106-149, 303-399, 401-499,
(10) SWITCHING TEST The reconfiguration devices are tested and the switching stages inside the DMC and DU (Ref. Fig. 023) Display (A)
This is the step INITIAL CONDITIONS where the operator is asked to
set the two related selector switch to NORM.
Display (B)
This is the step 1 where the operator is asked to check that colour
messages displayed on the DUs are in agreement with the ones listed
on the MCDU.
(Ref. Fig. 024)
1EFF : ALL 1 31-69-00Page 41 1 1 Aug 01/05 1 1 1CES 1
Switching test Figure 023
R 1EFF : 1 1 1CES 106-149, 303-399, 401-499, 1 111 31-69-00 Page 42 Aug 01/05
INTENTIONALLY BLANK
R 1 1
31-69-00Page 43
1 1 Feb 01/05 1 1 1CES 1
Switching test Figure 024 (SHEET 1)
R 1EFF : 106-149, 303-399, 401-499, 1 31-69-00Page 44 1 1 Aug 01/05 1 1 1CES 1
Switching test Figure 024 (SHEET 2)
R 1EFF : 106-149, 303-399, 401-499, 1 31-69-00Page 45 1 1 Aug 01/05 1 1 1CES 1
Display (C)
This is the step 2 = after the selector switch has been set to CAPT
the operator is asked to check that the messages displayed on the DUs
are in agreement with the ones mentionned.
Display (D)
This is the step 3 = after the selector switch has been set to FO the
operator is asked to check that the messages displayed on the DUs are
in agreement with the ones mentionned.
Display (E)
This is the step 3 for the DMC1: the operator is asked to check that
the messages on the DUs are in agreement with the ones mentionned.
Display (F)
This is the step 4 for the DMC1: the operator is asked to check that
the messages on the DUs are in agreement with the ones mentionned.
(Ref. Fig. 025)
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INTENTIONALLY BLANK
1 1
31-69-00Page 47
1 1 Feb 01/05 1 1 1CES 1
Switching test Figure 025 (SHEET 1)
R 1EFF : 106-149, 303-399, 401-499, 1 31-69-00Page 48 1 1 Aug 01/05 1 1 1CES 1
Switching test Figure 025 (SHEET 2)
R 1EFF : 106-149, 303-399, 401-499, 1 31-69-00Page 49 1 1 Aug 01/05 1 1 1CES 1 Display (G)
If during the steps 1, 2, 3 or 4 the operator answered the system with the key 5L only, that means that the test is succesful as mentionned on the page display (G) TEST OK.
Display (H)
If during the step 1 the key 5R has been pressed, the faulty link is displayed on display (H) DMC1 (1WT1)/INVALID DU.
Display (J)
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