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 MDDU - Board Layout
 Figure 008

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 MDDU - Block Diagram
 Figure 009

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 -CPU
 -FDDC
 The CPU part performs all MDDU processing tasks.
 The FDDC part performs the following functions:

 -mechanical control of the disk drive (motor start/stop, read/write head movement)
 -disk formatting
 -data read and write
 -disk status monitoring.
 (d) Mother board
 This board provides interconnection between the power supply, I/O and CPU/FDDC boards (supply voltages, data bus, address bus, etc.) and holds the LCD display.
 The display format is a row of 16 alphanumeric characters and its technology is off the transflective type:
 -
in bright light conditions, the characters appear in reflection mode

 -
in dark conditions, the characters appear by transparency by means of a blue backlight.

 (2)
 The disk drive is installed on shock mounts.

 (3)
 Interconnection is ensured by:

 (a)
 Wiring between the I/O board and the connector.

 (b)
 Flexible printed circuit between the CPU/FDDC board and the disk drive.

 (c)
 Wiring between the mother board and the disk drive.

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 The DLRB is based on modern technology such as microprocessor and programmable logic devices. Design is made of full static devices: no switching part or electromechanical device are mounted inside the equipment. Operation of the equipment is driven by software.
 (1) Mother board assembly
 The mother board assembly is composed of three boards. Their main function is to ensure interconnection between the four front connectors and the application boards and to offer protection against disturbance of any type present on the input or outpjut signals.
 - one board ensures external interconnection.
 - one board ensures internal interconnection.
 - one board fulfills Electromagnetic Interference (EMI) filter function and ensures lightning protection.
 (2) Children board
 (a)
 Two identical boards are in charge of multiplexing and demultiplexing the ARINC 429 buses devoted to target LRU. A discrete Load Enable output line is provided with each ARINC 429 bus.

 (b)
 Power supply and ARINC buffer boards

 - one board provides internal power supply of equipment, discrete inputs and outputs and signal adaptation of ARINC 429 buses.
 - one board provides central processing unit of DLRB. It is a classic processor board with a permanent memory for data base storage and an ARINC 429 transceiver, able to run only in low speed mode. ARINC 429 transceiver is used only for data base updating.
 C. DLS
 The DLS is made of three boards interconnected by way of flexible wires.
 -A board ensures a mechanical and an electrical interface for the three tactile keys PREV NEXT and SEL CTL. This board is located just behind the front panel of the DLS.
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 -
A board ensures the serial-to-parallel conversion and panel backlighting control.

 -
A board provides the interconnection between the board which ensures the serial-to-parallel conversion and the rear connector and supports Electromagnetic Interference (EMI).

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 8. Operation/Control and indicating
________________________________ **ON A/C 201-203,
 A. MDDU
 (1) Communication start-up
 When there is no disk in the disk drive, the data loader does not communicate with any of the computers. To activate the data loader, a disk must be inserted in the drive.
 The data loader reads the configuration file. Three cases are possible:
 (a) The disk is not formatted or the disk is formatted but there is no configuration file.
 As the disk has not configuration file, the data loader initiates an identification procedure serving to configure it correctly, defining the input and output buses and the label of the computer concerned by a downloading operation.
　
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