(g)  
The TAT/N1 limit system provides the following functions

 within the auto throttle system: N1 limit mode selection Computation of the required N1 limit Visual readout of the selected N1 limit mode, computed N1 limit, and total air temperature Transmittal of the N1 limit mode, N1 limit, and TAT signals to the auto throttle computer
 (2)  Computation of TAT/N1 limit
 (a)  The TAT/N1 limit computer receives analog input signals representative of airplane altitude and mach, total air temperature (TAT), and flight mode. These inputs are utilized by the computer in N1 computations. In addition to outputting N1 limit and mode data to the TAT/N1 limit indicator and the auto throttle system, the computer supplies auxiliary outputs to the AIDS recorder and N1 command counter on N1 command indicators.
 EFFECTIVITY LH 011-030,051-070,082-099;
 AF 121-199; AZ 221-299; AND GN 601-699 AIRPLANES  CONFIG 1 WITHOUT PMS  16 Page 10
   Sep 25/94

34-15-00
 (b)  
The computer utilizes additional discrete inputs such as nacelle and wing anti-ice, CADC valid, test, and discrete inputs from the airplane air conditioning bleed air system (a/c pack 1=0, 2=0, and 3=0) as shown in Fig. 2. The computer also receives an added discrete (aspirated probe) to designate whether a standard TAT probe or aspirated probe is in use.

 (c)  
The CADC valid signal informs the computer that its mach and altitude input signals are valid. A go, no-go TAT/N1 limit system check may be accomplished by sending a test signal to the computer from the system mode selector panel. The computer computes and outputs a preprogrammed N1 limit to the system TAT/N1 limit indicator for comparison by the operator.

 (d)  
The computer contains eleven plug-in boards and a power supply and may be divided into two general sections. Boards A1 thru A5 and A7 make up the central processor section. Boards A8 thru A12 comprise the MADDAM section (multiplexed analog-to-digital digital-to-analog multiplexed).

 (3)  Central Processor
 (a)  
The central processor controls and coordinates all of the subunits of the computer. It provides for the orderly transfer of information between all parts of the system.

 (b)  
Memory board A5 contains the program memory which is a programmable read-only type (PROM) containing the program of instructions and fixed data necessary to guide and sequence the computer hardware through the actions required to produce the desired results.

 (c)  
Memory board A4 contains the working registers which are comprised of two banks of eight registers. They are used as sources and destinations of operands thus providing the so-called read/write or "scratch pad" memory. It serves as a temporary storage of A/D conversion results and storage of arithmetic computation results.

 (d)  
The control unit (A1 and A2) contains the basic clock and necessary circuitry to generate bit and word times to perform all the operations. It controls the fetching of each instruction from the PROM and coordinates its decoding and execution. It interprets these coded instructions from memory and generates all the timing and gating signals used to control, coordinate and provide for the orderly transfer of information between all parts of the computer.

 (e)  
The arithmetic unit (A/U) board A3 contains: three 16-bit shift registers; a serial adder/subtractor, and the gates needed to perform the basic arithmetic operations of add, subtract, multiply, divide and shift. It uses operands from the read/write memory and processes the data under command of the control unit. The result is sent back to the read/write memory for temporary storage. It also supplies digital instructions and data for A/D and D/A conversions, and routes the results of the A/D conversions to the read/write memory.

 EFFECTIVITY
 LH 011-030,051-070,082-099;

 AF 121-199; AZ 221-299; AND GN 601-699 AIRPLANES  CONFIG 1 WITHOUT PMS  05 Page 11
   Sep 25/94

34-15-00
 (f)  
The digital input/output (I/O) board A7 contains the circuitry necessary to communicate between the central processor and MADDAM for conversions. The interface consists of three registers called channels. Channel 2 receives and holds the "command word" from the A/U identifying the type of conversion to be performed. For a D/A conversion, channel 0 accepts the digital number from the A/U. For A/D conversions channel 0 accumulates the X component and channel 1 accumulates the Y component. The digital result is shifted serially to the A/U.

 (g)  
The I/O board receives additional discrete signals which are converted from 28 volts dc to logic levels by a level converter on transformer assembly A12. These dc inputs are loaded into the registers along with the inputs from the MADDAM. Two discretes generated by the I/O board are coupled to a decoder/driver circuit on transformer assembly A12 to provide computer thrust derating annunciation outputs to the auto throttle system. The I/O board also contains various discrete flip-flops used to control the three failure lights on the computer. In the event of a failure, the lights indicate which input signals to the computer are incorrect.
　
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