(c)
Memory board A4 contains the working registers which are comprised of two banks of eight registers. They are used as sources and destinations of operands thus providing the socalled read/write or "scratch pad" memory. It serves as a temporary storage of A/D conversion results and storage of arithmetic computation results.
(d)
The control unit (A1 and A2) contains the basic clock and necessary circuitry to generate bit and word times to perform all the operations. It controls the fetching of each instruction from the PROM and coordinates its decoding and execution. It interprets these coded instructions from memory and generates all the timing and gating signals used to control, coordinate and provide for the orderly transfer of information between all parts of the computer.
(e)
The arithmetic unit (A/U) board A3 contains: three 16-bit shift registers; a serial adder/subtractor, and the gates needed to perform the basic arithmetic operations of add, subtract, multiply, divide and shift. It uses operands from the read/write memory and processes the data under command of the control unit. The result is sent back to the read/write memory for temporary storage. It also supplies digital instructions and data for A/D and D/A conversions, and routes the results of the A/D conversions to the read/write memory.
EFFECTIVITY
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(f)
The digital input/output (I/O) board A7 contains the circuitry necessary to communicate between the central processor and MADDAM for conversions. The interface consists of three registers called channels. Channel 2 receives and holds the "command word" from the A/U identifying the type of conversion to be performed. For a D/A conversion, channel O accepts the digital number from the A/U. For A/D conversions channel O accumulates the X component and channel 1 accumulates the Y component. The digital result is shifted serially to the A/U.
(g)
The I/O board receives additional discrete signals which are converted from 28 volts dc to logic levels by a level converter on transformer assembly A12. These dc inputs are loaded into the registers along with the inputs from the MADDAM. Two discretes generated by the I/O board are coupled to a decoder/driver circuit on transformer assembly A12 to provide computer thrust derating annunciation outputs to the auto throttle system. The I/O board also contains various discrete flip-flops used to control the three failure lights on the computer. In the event of a failure, the lights indicate which input signals to the computer are incorrect.
(4) MADDAM
(a)
This portion of the computer converts ac and dc input information into digital form for computational use by the computer. Conversions are performed utilizing a Multiplexed Analog-to-Digital and Digital-to-Analog Multiplexed (MADDAM) technique. It also converts computed digital information into analog dc output signals. The technique used is the conversion of voltage to time, by the use of a linear ramp.
(b)
The CADC ac synchro input signals to transformer assembly board A12 are applied to the computer through isolation input transformers. An X-Z and Y-Z component of each synchro input is developed by the transformers. These components will ultimately be changed to digital numbers representing their voltage levels so synchro angle can be determined. The A12 board contains a voltage divider network for the program return low and program return high outputs; and level converters for the a/c pack 1=0, 2=0, 3=0 inputs. The board also contains an additional level converter for the aspirated probe discrete and a decoder/driver circuit for providing signal lamp drive outputs to the auto throttle system which provide annunciation of the derating the computer is calculating.
EFFECTIVITY
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(c)
The ac input module A11 contains two pairs of field effect transistor (FET) switches. One pair of switches is used for the X component and the other pair for the Y component of each synchro input. These synchro signals are applied to the switches which are controlled by separate logic circuitry synchronized to the synchro excitation voltage. The logic ensures the switches close at the exact time to pass only the peak value of the ac signal. This peak value is stored on separate holding capacitors, one for X and one for Y. Thus each synchro input is converted into a pair of dc voltages. Each pair of dc output voltages is updated every 10 ms.
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