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時間:2010-06-12 21:49來源:藍天飛行翻譯 作者:admin
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(a) MODE 4 CODE selector switch —
ZERO.
(b) MODE 4 CODE selector switch — A or
B, as applicable.
(c) MASTER control switch — OFF.
d. Turn KYK-13 Mode switch to OFF.
e. Disconnect KYK-13 from aircraft receptacle.
Figure 3-4-1. AN/APX-100 Control Panel
3-4-4. GPS Zeroize Switch. (fig. 2-1-8)
The GPS Zeroize switch is located on center instrument
panel, right side of AN/APR-39AV(1) Indicator, and is
used to erase any crypto data and all navigational information
stored in the GPS Receiver.
This zeroize switch consists of a guarded toggle switch.
3-4-5. Normal Operation - GPS Zeroize Switch.
NOTE
Aircraft battery must be connected, or power
applied to aircraft.
a. Lift protective guard from zeroize toggle switch
and activate switch.
b. If GPS receiver is on, turn Data Switch to Stat.
Observe message on Page 1, Line 2.
TM 1-1520-240-10
3-4-4
The message ZEROED indicates a successful attempt
to erase information stored in the GPS receiver.
The message ZERO FAIL indicates an unsuccessful attempt
to erase the information. The GPS receiver remains
classified.
c. An alternate method to zeroize the GPS receiver
is to use the C-11702/UR and GPS Control Unit keyboard
as follows:
(1) Select STAT page 1.
(2) Enter ZZ on line 4, and push Line Select Key
4.
(3) If ZEROIZED message is displayed on
STAT Page 1, Line 2, the GPS receiver is declassified.
(4) If ZERO FAIL message is displayed, zeroization
was not successful and the GPS receiver remains
classified.
Figure 3-4-2. Remote GPS Data Loader Receptacle/KYK-13 Fill Panel
TM 1-1520-240-10
4-1-1
CHAPTER 4
MISSION EQUIPMENT
SECTION I. MISSION AVIONICS
4-1-1. Radar Signal Detecting, AN/APR-39(V)1.
The radar signal detecting set (RSDS) AN/APR-39A(V)1 is
a passive electronic warfare system that provides visual
and aural indications of the presence of and bearing to
active radar transmitters. The RSDS detects those pulse
radar signals usually associated with hostile fire control
radars in the H-J and MMW (millimeter wave) frequency
bands. The RSDS is the heart of the helicopter threat warning
suite. It interfaces with the laser detecting set AN/
AVR-2, missile warning system AN/AAR-47, and radar
warning system AN/APR 44(V)3 to process, display, and
announce threats detected by those systems. The system
consists of the indicator on the center instrument panel (fig.
2-1-8), a digital processor located in the right aft avionics
pod, two video receivers (one at station 50, another at
station 605), four spiral antennas (hi–band) outside the
helicopter (Two at station 26, two at station 623), and a
blade antenna (lo-band) mounted on the bottom of the
fuselage at station 99. In addition, a separate AN/
APR-39A(V)1 volume control labeled audio on the centered
console provides additional volume control capabilities
external of the ICS (fig. 4-1-2). The RSDS is powered
in the No. 2 DC bus through the ASE RADAR WARN circuit
breaker on the No. 2 PDP
a. The antenna-detector characteristics determine
the frequency range of the system. Each of the antennadetectors
contain two spiral elements, one operating in the
H-J bands and operating in the MMW (millimeter wave)
region. Each of the spiral elements receive radio frequency
(RF) signals in their respective band and supply it to the
detector circuits. The detector portion of the antenna-detector
employs an elaborate set of filter banks that extract
the video (pulses) from the RF received in each band. The
resultant video outputs are then summed and provided as
a composite video signal to the appropriate video receiver.
b. Each video receiver has two video input channels
and they serve the left and right antenna-detectors for
the corresponding forward or aft sector. The video receiver
supplies power to the antenna-detectors and amplifies the
detected video inputs from the antenna-detectors. Two video
outputs are then sent to the digital processor for signal
analysis. The video receiver also performs initiated built-in
test on command from the digital processor
c. The digital processor supplies 15 VDC operating
power to the two video receivers and superimposes a
self-test signal on the 15 VDC power line to the receivers
during RSDS self-test. The digital processor receives
video inputs from the video receivers and processes
them to determine signal parameters. These signal parameters
include pulse repetition interval (PRI) pulse
with (PW), pulse spacing (PS), and signal strength. The
 
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