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ready and receive not ready indications.
5.2.5.1.4 PROCESSINGOF M-BIT
AND S-BIT SEQUENCES
Note.- M-bit processing applies to the sequencing of the
DATA packet. S-bit processing applies to the sequencing of
Mode S CALL REQUEST, CALL ACCEPT, CLEAR REQUEST
and INTERRUPT packets.
5.2.5.1.4.1 M-bit processing
Note.- The packet size used on the DTEDCE irzteguce
can be diflerent from that used on the ADCWGDCE inte$ace.
5.2.5.1.4.1.1 M-bit processing shall be used whcn
DATA packets are reformatted (5.2.5.2). M-bit processing
shall utilize the specifications contained in the IS0 8208
standard. The M-bit sequence processing shall apply on a per
channel basis. The M-bit s c t~o 1 shall indicate that a user data
field continues in the subsequent DATA packet. Subsequent
packets in an M-bit sequence shall use the same header format
(i.e. the packet format excluding the user data field).
5.2.5.1.4.1.2 If the packet size for the XDCE (5.2.6.4.2)
interface is larger than that used on the DTE/DCE interface,
packets shall be conlbined to the extent possible as dictated by
the M-bit, when transmitting a Mode S DATA packet. If the
packet size is smaller on the XDCE interface than that defined
on the DTEDCE interface, packets shall be fragmented to fit
into the smaller Mode S packet using M-bit assembly.
5.2.5.1.4.1.3 A packet shall be combined with subsequent
packets if the packet is filled and more packets exist in
the M-bit sequence (M-bit = 1). A packet smaller than the
maximum packet size defined for this SVC (partial packet)
shall only be allowed when the M-bit indicates the end of an
M-bit sequence. A received packet smaller than the maximum
packet size with M-bit equal to 1 shall causc a reset to be
generated as specified in IS0 8208.
5.2.5.1.4.1.4 Recommendation.- In order to decrease
delivery delay, reformatting slzould be performed on the
parrial receipt of an M-bit sequence, rather than delay
reforrnarting until the complete M-bit sequence is received.
5.2.5.1.4.2 S-bitprocessing. S-bit processing shall apply
only to Mode S CALL FEQUEST, CALL ACCEFT, CLEAR
REQUEST and lNTERRUlT packets. This processing shall be
performed as specified for M-bit processing (5.2.5.1.4.1)
except that the packets associated with any S-bit sequence
whose reassembly is not completed in Tq seconds (Tables 5-1
and 5-13) shall be discarded (5.2.6.3.6, 5.2.6.4.5.2 and
5.2.6.91, and receipt of a packet shorter than the maximum
packet size with S = 1 shall cause the entire S-bit sequence to
be treated as a format error in accordance with Table 5-16.
5.2.5.1.5 MODE $ SUBNETWORK ERROR PROCESSING
FOR flO 8208 PACKETS
5.2.5.1.5.1 D-bit. If the XDLP receives a DATA packet
with the D-bit set to 1, the XDLP shall send a RESET
REQUEST packet to the originating DTE containing a cause
code (CC) = 133 and a diagnostic code (RC) = 166. If the
D-bit is set to 1 in a CALL REQUEST packet, the D-bit shall
be ignored by the XDLP. The D-bit of the corresponding
CALL ACCEIT packet shall always be set to 0.
5.2.5.1 5.2 Q-bit. If the XDLP receives a DATA packet
with the Q-bit set to 'I, the XDLP shall send a RESET
REQUEST packet to- the originating DTE containing
CC = 133 and DC = 83.
5/11/98
No. 73
Part I Annex I0 - AeronuuticuZ Telecommunications
5.2.5.1.5.3 Invalid priority. If the XDLP receives a call
request with a connection priority value equal to 2 through
254, the XDLP shall clear the virtual circuit wing DC = 66
and CC= 131.
5.2.5.1 S.4 Unsupported facility. I f the XDLP receives
a call request with a request for a facility that it cannot
support, the XDLP shall clear the .virtual circuit using
DC= 65 and CC= 131.
5.2.5.1.5.5 Illegal calling DTE address. I f the XDLP
receives a call request with an illegal calling DTE address
(5.2.3.1.3.3), the XDLP shall clear the virtual circuit using
DC = 68 and CC = 141.
5.2.5.1.5.6 Illegal called DTE address. If the XDLP
receives a call request with an illegal called DTE address
(5.2.3.1.3-31, the XDLP shall clear the virtual circuit using
DC = 67 and CC = 141.
5.2.5.2 REFORMATTINPRGO CESS
Note.- The reformatting process is divided into two
subprocesses: uplink formatting and downlink formatting. For
the ADLP, the uplink process reformats Mode S packets into
IS0 8208 packets and the downlink process reformats IS0
8208 packets into Mode S packets. For the GDLe the uplink
process reforrnatr IS0 8208 packets into Mode S packets and
the downlink process reformats Mode S packets inro IS0 8208
packets.
5.2.5.2.1 CALL REQUEST BY ADLP
　
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